/*
* azsnake — where firmware softens
* NTU EEE | embedded | data | full-stack
*/
#include <stdint.h>
#include <stdbool.h>
typedef enum {
MODE_STUDENT,
MODE_ENGINEER,
MODE_PROGRAMMER,
MODE_ENTREPRENEUR,
MODE_HOMO_SAPIENS,
MODE_BADMINTON_PLAYER,
MODE_CYCLIST,
MODE_GAMER
} mode_t;
typedef struct {
mode_t mode; // changes with the semester
uint32_t side_projects; // monotonically increasing
uint32_t experience; // XP
uint32_t bugs_squashed; // fixed while shipping
uint32_t coffee_cups; // slack fuel
uint32_t git_commits; // push count
uint32_t gym_sessions; // workouts logged
bool always_learning;
} azsnake_t;
azsnake_t me = {
.mode = MODE_ENGINEER,
.side_projects = 0,
.experience = 0,
.bugs_squashed = 0,
.coffee_cups = 0,
.git_commits = 0,
.gym_sessions = 0,
.always_learning = true,
};
int main(void) {
for (;;) {
if (me.always_learning) {
tinker_with_hardware(); // debugging hardware
ship_software(); // coding mode on
me.bugs_squashed++;
me.git_commits++;
study();
me.experience++;
slack_off();
me.coffee_cups++;
play_games();
hit_the_gym();
me.gym_sessions++;
me.side_projects++;
}
}
return 0; // unreachable — still building
}
@ Eren Zhao, also go by azsnake
I am
Exploring chips, embedded systems, data analytics, and product engineering.
// who is behind the repo
About
I am an EEE undergraduate at NTU who likes building things — from registers and state machines to webpages and services that you can actually use.
I care about systems that survive contact with the real world — firmware that boots, pipelines that converge, and interfaces that stay out of your way.
Building reliable systems across hardware and software.
// azsnake_core — me excised
module azsnake_core #(
parameter WIDTH = 32
) (
input wire clk,
input wire rst_n,
output reg [WIDTH-1:0] output_o,
output wire shipping_o
);
localparam S_IDLE = 3'b000; // unused
localparam S_TINKER = 3'b001; // debugging hardware
localparam S_SHIP = 3'b010; // in code-monkey mode
localparam S_STUDY = 3'b011; // studying
localparam S_SLACK = 3'b100; // slacking off
localparam S_GAME = 3'b101; // gaming
localparam S_GYM = 3'b110; // gym
localparam S_GRIND = 3'b111; // side project++
reg [2:0] state_q, state_d;
always @(*) begin
state_d = state_q;
case (state_q)
S_TINKER: state_d = S_SHIP;
S_SHIP: state_d = S_STUDY;
S_STUDY: state_d = S_SLACK;
S_SLACK: state_d = S_GAME;
S_GAME: state_d = S_GYM;
S_GYM: state_d = S_GRIND;
S_GRIND: state_d = S_TINKER;
default: state_d = S_TINKER;
endcase
end
always @(posedge clk or negedge rst_n) begin
if (!rst_n)
state_q <= S_TINKER;
else
state_q <= state_d;
end
always @(posedge clk) begin
case (state_q)
S_SHIP: output_o <= output_o + 1; // bugs shipped
S_STUDY: output_o <= output_o + 2; // XP buff
S_GRIND: output_o <= output_o + 1; // side quest++
default: output_o <= output_o;
endcase
end
assign shipping_o = (state_q == S_SHIP);
endmodule
// where the foundations were built
Education
Aug 2024 - Present
Nanyang Technological University
Undergraduate
Studying electrical and electronics engineering with a second major in data analytics and a minor in entrepreneurship.
Singapore
Aug 2026 - Dec 2026
Georgia Institute of Technology
Semester Exchange
Academic exchange at Georgia Tech.
Atlanta, USA
Sep 2021 - Jun 2024
Chengdu No.7 High School
High School
Merit student.
Chengdu, China
// hats worn so far
Experience
May 2026 - Present
Intern
Bestechnic (Shanghai) Co., Ltd.
Internship at Bestechnic (Shanghai) Co., Ltd.
Dec 2025 - Present
Founder & Full-Stack Engineer
Chengdu RentHub Internet Service Co., Ltd.
Leading product development for a rental platform with a React 18, TypeScript, and Vite admin panel plus CI/CD and Jest coverage.
Apr 2025 - Aug 2025
Embedded Software Development Internship
Chengdu Quwei Technology Co., Ltd.
Built Linux/socket-based communication software for vehicle-to-server data exchange under GB/T32960.3-2016.
// shipped work and side quests
Projects
RentHub
Founder & Full-Stack Engineer
Proprietary — source not public
Rental marketplace — storefront, merchant admin, and ops. I own the full-stack architecture and delivery pipeline.
MIPI CSI-2 Validation Framework
FPGA Engineer
FPGA sensor bring-up on VU13P: block design, MicroBlaze firmware, and host tooling for 2-Lane RAW10 capture and lane-level debug.
AD/DA Bring-Up Framework
FPGA Engineer
VU13P RF front-end bring-up: auto-init for clock, ADC, and DAC over UART/SPI, plus IQ DSP chain and PySide6 test harness.
LLM Knowledge Graph Builder
Lead Developer
Turn math textbooks into interactive knowledge graphs via a Plan–Generate–Evaluate LLM pipeline.
Dukrian
Full-Stack Developer
Marketing site and on-site checkout for a Singapore Musang King durian brand.
AES-128 Pipeline Core
RTL Designer
11-stage AES-128 pipeline in Verilog — FIPS-197 compliant, muxed 32-bit bus for pin-limited FPGAs.
4G Vehicle T-Box
Embedded Engineer
Client NDA — repo private
4G telematics firmware — GB/T32960 vehicle data over Linux sockets. Shipped under client NDA.
// stacks within arm's reach